Logic - Parity Generators and Checkers

Logic - Parity Generators and Checkers

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Base Part Number
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Image Part Number Manufacturer Description Series Operating Temperature Packaging Mounting Type Voltage - Supply Package / Case Base Part Number Supplier Device Package Current - Output High, Low
74HC280D,653 Nexperia IC 9-BIT GEN/CHKER 14SO 74HC - Tape & Reel (TR) Surface Mount 2V ~ 6V 14-SOIC (0.154", 3.90mm Width) 74HC280 14-SO -
CD74HC280M96 N/A IC 9-BIT GEN/CHKER 14SOIC 74HC -55°C ~ 125°C Tape & Reel (TR) Surface Mount 2V ~ 6V 14-SOIC (0.154", 3.90mm Width) 74HC280 14-SOIC 5.2mA, 5.2mA
CD74ACT280E N/A IC 9-BIT GEN/CHKER 14DIP 74ACT -55°C ~ 125°C Tube Through Hole 4.5V ~ 5.5V 14-DIP (0.300", 7.62mm) 74ACT280 14-PDIP 24mA, 24mA
SN74AS286NSR N/A IC 9-BIT GEN/CHKER 14SO 74AS 0°C ~ 70°C Tape & Reel (TR) Surface Mount 4.5V ~ 5.5V 14-SOIC (0.209", 5.30mm Width) 74AS286 14-SOP 15mA, 48mA; 2mA, 20mA
N74F280BN,602 NXP Semiconductors / Freescale IC 9-BIT GEN/CHKER 14DIP 74F -40°C ~ 85°C Tube Through Hole 4.5V ~ 5.5V 14-DIP (0.300", 7.62mm) 74F280 14-DIP 1mA, 20mA
CD74AC280M96 N/A IC 9-BIT GEN/CHKER 14SOIC 74AC -55°C ~ 125°C Original-Reel® Surface Mount 1.5V ~ 5.5V 14-SOIC (0.154", 3.90mm Width) 74AC280 14-SOIC 24mA, 24mA
CD74AC280E N/A IC 9-BIT GEN/CHKER 14DIP 74AC -55°C ~ 125°C Tube Through Hole 1.5V ~ 5.5V 14-DIP (0.300", 7.62mm) 74AC280 14-PDIP 24mA, 24mA
SY100E193JZ TR Micrel / Microchip Technology IC 8-BIT GENERATOR 28PLCC 100E 0°C ~ 85°C Tape & Reel (TR) Surface Mount 4.2V ~ 5.5V 28-LCC (J-Lead) 100E193 28-PLCC (11.5x11.5) -
CD74HC280MT N/A IC 9-BIT GEN/CHKER 14SOIC 74HC -55°C ~ 125°C Original-Reel® Surface Mount 2V ~ 6V 14-SOIC (0.154", 3.90mm Width) 74HC280 14-SOIC 5.2mA, 5.2mA
74ACT280MTR STMicroelectronics IC 9-BIT GEN/CHKER 14SO 74ACT -55°C ~ 125°C Tape & Reel (TR) Surface Mount 4.5V ~ 5.5V 14-SOIC (0.154", 3.90mm Width) 74ACT280 14-SO 24mA, 24mA

About Logic - Parity Generators and Checkers


Parity generators and checkers are logic circuits used to implement parity checking schemes in digital systems. Parity checking is a method for detecting errors in transmitted data by adding an extra parity bit to the data stream. Parity generators calculate the parity bit based on the data inputs, while parity checkers verify the correctness of the received data by comparing it to the expected parity value. Parity generators and checkers are essential components in error detection and correction mechanisms employed in communication protocols, storage systems, and memory interfaces to ensure data integrity.